1. Field of the Invention
The present invention relates to semiconductor devices and manufacturing methods therefore, and more particularly relates to a technique that can be advantageously applied to semiconductor devices employing capacitors, such as dynamic random access memory (DRAM), and to manufacturing methods therefore.
2. Description of the Related Art
Increasing the integration density of a semiconductor device including an LSI, such as DRAM, requires reducing the size of the capacitors in the device. However, these capacitors must still store the amount of charge required for properly reading a memory to prevent soft errors. That is, in order to enhance the integration density of a semiconductor device (such as DRAM), it is necessary to increase the amount of charge amount per unit area stored on the capacitors. As the minimum feature size of DRAM has been reduced, it has become increasingly difficult to ensure capacitors having a sufficient storage capacitance. To overcome this problem, efforts have been made to use a high dielectric constant material as a capacitor dielectric film. Examples of such materials include Al2O3 (having a relative dielectric constant of approximately 9), HfO2 (having a relative dielectric constant of approximately 20-25), ZrO2 (having a relative dielectric constant of approximately 20-25), and Ta2O5 (having a relative dielectric constant of approximately 25). These materials are intended to replace SiO2 (having a relative dielectric constant of approximately 4) and Si3N4 (having a relative dielectric constant of approximately 7), which have been used as capacitor dielectric films.
Further, in the case of gigabit generation DRAMs, which have a critical dimension (or minimum feature size) of 0.1 μm or less, the capacitors must have a three-dimensional shape even if they are formed of a high dielectric constant material, in order to store an increased amount of charge. (Examples of such three-dimensional capacitors include trench capacitors and stacked capacitors.) Therefore, it is necessary to deposit the dielectric film by CVD (Chemical Vapor Deposition), which is a superior technique in terms of covering step portions (or uneven portions). That is, in order to manufacture gigabit generation DRAM, it is essential to establish and use an appropriate deposition technique (based on CVD), as well as using a high dielectric constant material having good electrical characteristics. It should be noted that ALD (Atomic Layer Deposition) is a type of CVD and is used to form a dielectric film by alternately supplying an organometallic material and an oxidant.
Conventional DRAMs have employed capacitors having an MIS (Metal-Insulator-Semiconductor) structure in which the lower electrode is made up of a polysilicon film. However, the MIS structure is disadvantageous in that it is difficult to reduce the EOT (Effective Oxide Thickness) of the dielectric film, since an SiO2 layer grows at the interface between the lower electrode and the dielectric film during formation of the film and during the postheat treatment and reduces the effective storage capacitance. Therefore, in order to achieve an EOT of 1.5 nm or less, a capacitor must have an MIM (Metal-Insulator-Metal) structure in which the lower electrode is formed of a metal material to eliminate any parasitic capacitance. It should be noted, however, that the above SiO2 layer formed at the interface between the lower electrode and the dielectric film in the MIS capacitor structure contributes significantly to reduction of the leakage current although its capacitance (parasitic capacitance) reduces the storage capacitance, as described above. On the other hand, since the MIM capacitor structure does not have such an SiO2 layer, the dielectric film itself must be formed to have a reduced leakage current. However, it is not easy to implement such a dielectric film forming method. An exemplary conventional MIM capacitor structure that can be applied to DRAM is the TiN/Al2O3/TiN structure in which the upper and lower electrodes are made up of a TiN film and the dielectric film is formed of Al2O3. Further, MIM capacitor structures using an HfO2 dielectric film or an HfO2 aluminate dielectric film (a laminated structure of HfO2 and Al2O3) have been investigated for use in the next generation DRAM.
According to the International Technology Roadmap for Semiconductors (ITRS), 65 nm technology node DRAM requires capacitors having an EOT of 0.8 nm or less. If the minimum allowable physical thickness of the dielectric film is assumed to be 6 nm to reduce the direct tunneling current, the dielectric film must have a relative dielectric constant of higher than 30 to have an EOT of 0.8 nm or less.
Since Al3O3 films (which are currently used in DRAM) have a relative dielectric constant of only approximately 9, they cannot be used in 65 nm technology node DRAM. HfO2 films (which are currently being developed to meet the 85 nm technology node) and HfO2 aluminate films are also difficult to use in 65 nm technology node DRAM, since HfO2 films have a relative dielectric constant of only 20-25 and HfO2 aluminate films have a relative dielectric constant intermediate between those of HfO2 and Al2O3 films. (The actual value of the relative dielectric constant of each HfO2 aluminate film depends on its composition.) That is, there are no capacitor dielectric materials currently available that meet the 65 nm-technology node.
It is expected that 85 nm technology node DRAM will have an MIM capacitor structure in which the upper and lower electrodes are made up of a TiN film and the dielectric is formed of HfO2 or HfO2 aluminate. Therefore, it is desirable that 65 nm technology node DRAM capacitors also employ TiN electrodes to maintain technical consistency. With TiN electrodes, the dielectric must be made of a material that is more stable in oxide form than TiO2. That is, if the dielectric material has a larger free energy of oxide formation than TiO2 (for example, if it is Ta2O5), the dielectric film (or material) oxidizes the TiN electrodes, resulting in reduced effective capacitance and/or increased leakage current. Therefore, it may be preferable to use a dielectric material having a lower free energy of oxide formation than TiO2 (that is, having a higher absolute free energy value of oxide formation than TiO2), such as Al2O3, HfO2, or ZrO2 to stabilize the interface. Since the relative dielectric constant of Al2O3 is low (approximately 9), it is desirable to develop a dielectric material that includes as a base material HfO2 or ZrO2, which have a high relative dielectric constant (20-25).
That is, to meet the 65 nm technology node, DRAM capacitors must be formed of a dielectric material that has a relative dielectric constant of higher than 30 and that includes as a base material HfO2 or ZrO2, which are more stable in oxide form than TiO2.
As is known, post-treating an amorphous HfO2 film at approximately 400° C. crystallizes the film and stabilizes its monoclinic phase. Further, the relative dielectric constant of an HfO2 film depends on its crystalline structure; namely, the relative dielectric constant of the monoclinic phase is 16-18, that of the cubic phase is 29, and that of the tetragonal phase is 70 (see Physical Review, vol. B65, 2002, page 233106 (Nonpatent Document 1)). That is, the relative dielectric constant of an HfO2 film decreases from 20-25 to 16-18 when the film crystallizes from its amorphous phase to monoclinic phase. A phase diagram indicates that: the low-temperature stable phase of HfO2 is the monoclinic phase; and HfO2 undergoes the phase transition from the monoclinic phase to the tetragonal phase at 1750° C., and the phase transition from the tetragonal phase to the cubic phase at 2700° C. (see Journal of American Ceramic Society, vol. 58, 1975, page 285 (Nonpatent Document 2)). That is, HfO2 occurs only as a monoclinic phase at present semiconductor process temperatures; it cannot exist as a cubic or tetragonal phase in a thermal equilibrium state at these temperatures.
It was recently reported that heat-treating HfO2 doped with 4 or more at. % Y2O3 at approximately 600° C. stabilizes the cubic phase and thereby increases the relative dielectric constant to approximately 27 (see Applied Physics Letters, vol. 86, 2005, page 102906 (Nonpatent Document 3)). This research was undertaken to use a Y2O3-doped HfO2 film as a gate insulating film. It is already known that doping ZrO2 with Y2O3 stabilizes the cubic phase at low temperature. Therefore, it is thought that the same mechanism caused the stabilization of the HfO2 low-temperature stable phase (i.e., the cubic phase).